Numbering Code	G-INF06 63687 LJ10 G-INF06 63687 LJ11	Year/Term	2022 ・ Second semester
Number of Credits	2	Course Type	Lecture
Target Year		Target Student
Language	Japanese	Day/Period	Wed.3
Instructor name	TAKAGI NAOFUMI (Graduate School of Informatics Professor)
Outline and Purpose of the Course	Various dedicated circuits are equipped in VLSI systems for high-speed and low-power processing. In development of such circuits, design of their underlying hardware algorithms, i.e., procedures suitable for hardware implementation, are crucial. In this lecture, we learn hardware algorithms and their design methods mainly for arithmetic operations.
Course Goals	・Understanding design methods of hardware algorithms
Schedule and Contents	・Introduction to hardware algorithms (1) ・Hardware algorithms for addition (2) ・Hardware algorithms for multiplication (2) ・Hardware algorithms for division and square rooting (2) ・Hardware algorithms for elementary functions (2) ・Hardware algorithms for arithmetic (2) ・Systolic algorithms (1) ・Functional memory algorithms (2) ・Term-end examination (1) ・Feedback (1)
Evaluation Methods and Policy	Term-end examination (about 70%) and reports (about 30%)
Course Requirements	Students are expected to have some prior knowledge of computer architecture, logic circuits, and algorithms.
Study outside of Class (preparation and review)	・Students are required to prepare for each classroom based on the textboo k and given slides . ・Students are required to solve exercises given at each classroom and to submit the answers till the specified date before the next classroom.
Textbooks	Textbooks/References	VLSI Algorithms for Arithmetic Operations, Naofumi Takagi, (Corona-sha), ISBN:4-339-02585-2
Related URL	http://www.lab3.kuis.kyoto-u.ac.jp/~ntakagi/ha.html